The present invention relates to a method for fabricating a capacitor of a semiconductor device; and, more particularly, to a method for fabricating a capacitor using an electrochemical deposition method and Ce(NH4)2(NO3)6 solution.
At present, semiconductor memory devices are largely divided into a random access memory (RAM) and a read-only memory (ROM). Particularly, RAM is divided again into a dynamic RAM (DRAM) and a static RAM. Among them, DRAM which is composed of unit cells, each including a transistor and a capacitor, is most favorable for high degree of integration and, accordingly, DRAM is leading the semiconductor memory market.
Meanwhile, due to the great progress in the degree of integration, the capacity of a memory has increased four times as high as it used to be three years ago. Nowadays, 256 mega or 1 giga-class DRAM is about to be mass-produced.
As the integration of DRAM becomes higher, the memory cell area should be smaller. In case of 256M DRAM, the memory cell area should be less than 0.5 xcexcm2, and its capacitor area, which is a basic constituent of the cell, should become less than 0.3 xcexcm2. For this reason, the technology used in the conventional processing for a semiconductor over 256M DRAM is now facing a technological limitation.
That is, when a capacitor used in a 64M DRAM is fabricated using such a dielectric material as SiO2/Si3N4, in order to secure the required capacitance, the area occupied by the capacitor becomes more than six times as big as the cell area, even though it is assumed that the thin films of the capacitor are formed thinnest.
Accordingly, researchers are studying to seek a method for increasing the surface area of a capacitor to secure the required capacitance. To increase the surface area of a bottom electrode of the capacitor, various technologies using a three-dimensional stacked capacitor, trench-type capacitor or hemispherical polysilicon layer are suggested.
However, when a capacitor is fabricated using such a conventional dielectric material as oxide nitride oxide (ONO) in a semiconductor memory device over 256M DRAM, the capacitance cannot be increased more than that, because the thin film cannot be any thinner. Also, since the structure of the capacitor cannot be made more complex than now, the surface area of the capacitor cannot be increased any further, either. This is because the complex structure makes the process too complicated, as well as causing a problem of high production cost and dropping throughput.
To solve the above problems, dielectric materials having a higher dielectric constant than the conventional ONO dielectric material are adopted as a dielectric substance for the capacitor. The newly adopted high dielectric materials includes Ta2O5, (Ba,Sr)TiO3 (BST), Al2O3, SrTiO3, and TaON.
However, the dielectric constant of the above high dielectric materials changes according to what material is used for a bottom electrode of the capacitor. As far as found out, the dielectric characteristic becomes best when the high dielectric material is put on metal.
Accordingly, such metal as Pt, Ir, Rh and Ru are used for an electrode of the capacitor, instead of polysilicon which has been used for a bottom electrode conventionally.
When a metallic material is used for an electrode of a capacitor, the biggest problem in the capacitor fabrication process is the etching of the metallic material, which is for the bottom electrode of the capacitor.
Referring to FIGS. 1A to 1E, a conventional method for forming a Ru bottom electrode using a metal organic chemical vapor deposition (MOCVD) method. First, with reference to FIG. 1A, a first inter-layer insulation layer 11 is formed on a semiconductor substrate 10, which is completed with a predetermined process, such as formation of transistor and bit lines. Then, a contact hole is formed to expose a predetermined surface of the semiconductor substrate 10 by etching the first inter-layer insulation layer 11.
With reference to FIG. 1B, a polysilicon 12 is formed on the first inter-layer insulation layer 11 including the contact hole. Then, the polysilicon is recessed in a predetermined depth by performing etch-back to form a polysilicon plug 12 buried in a predetermined part of the contact hole.
Subsequently, titanium (Ti) is deposited on the entire surface of the substrate including the contact hole, and rapid thermal process (RTP) is performed to make the silicon atoms of the polysilicon plug 12 react with the titanium to form a titanium silicide (Ti-silicide) 13 on the polysilicon plug 12. The remaining non-reacted titanium is removed. Here, the titanium silicide 13 forms an ohmic contact with the polysilicon plug 12 and the subsequent bottom electrode.
Subsequently, a titanium nitride (TiN) 14 is formed on the entire structure including the contact hole. Then, the titanium nitride 14 remains only in the contact hole by performing chemical-mechanical polishing (CMP) or etch-back, until the surface of the first inter-layer insulation layer 11 is exposed. Here, the titanium nitride 14 performs the role of a barrier layer for preventing the diffusion of materials between the bottom electrode and the polysilicon plug 12 or the semiconductor substrate 10, or for preventing the diffusion of oxygen in the subsequent annealing process.
Referring to FIG. 1C, an oxide layer 15 is deposited on the entire structure, which is obtained by completing the above processes and includes the first inter-layer insulation layer 11 and the titanium nitride 14, to form a bottom electrode. Then, a trench 16 is formed by going through masking and etching processes.
Referring to FIG. 1D, a ruthenium (Ru) bottom electrode 17 is deposited by performing MOCVD on the entire surface including the trench 16. Then, with reference to FIG. 1E, the Ru bottom electrode 17 is removed except the Ru bottom electrode deposited on the inside of the trench to thereby isolate the bottom electrode.
Referring to FIG. 1F, a high dielectric thin film 18 and a top electrode 19 are formed sequentially on the entire structure including the Ru bottom electrode 17. This way, the capacitor fabrication process is completed.
The Ru bottom electrode which is deposited in the MOCVD method has a shortcoming that the fine thin film is not obtained, because the deposition process is performed at a low temperature. However, when RTP is performed in the hope of making the thin film fine, the Ru thin film becomes cracked.
If the Ru bottom electrode is cracked, the titanium nitride under the Ru bottom electrode is exposed. The exposed nitride forms a thin film having a low dielectric constant, and during the annealing, oxidation is performed, thus dropping the performance of the capacitor. This problem is inevitable as long as the Ru thin film is deposited at a low temperature to enhance the step coverage of the Ru thin film.
Moreover, when the Ru thin film is deposited at a low temperature, high step coverage is required to form a dielectric thin film and a top electrode successively in the trench as well as the Ru bottom electrode.
Therefore, the Ru bottom electrode has a limitation in its thickness, and when the bottom electrode is too thin, the characteristic as an electrode is dropped. Particularly, this becomes a big problem, as the degree of the integration becomes higher. Thus, a new method for forming a bottom electrode to overcome the limitation is required.
The methods for forming a bottom electrode are represented by a method that forms a platinum (Pt) electrode using electrochemical deposition. However, this method has a shortcoming that the leakage current of the Pt bottom electrode is not stable to the high dielectric materials, just except (Ba,Sr)TiO3 (BST). So, it is not widely applied.
In conclusion, among the methods for forming a bottom electrode using the various high dielectric materials, the method for forming Ru bottom electrode using electrochemical deposition is the most likely to be used widely.
The method for forming a Ru bottom electrode using electrochemical deposition has such an advantage that a fine bottom electrode could be obtained, but it also has following problems.
A Ru bottom electrode grown from a seed layer having the same-class noble metal, such as Pt, Ru and Ir, should be separated from the adjacent bottom electrodes by removing the exposed seed layer after the formation of the bottom electrode, and when the seed layer is removed in a reactive ion etching method, the upper part of the Ru bottom electrode, which is formed with a great deal of effort, is etched more than the seed layer.
In addition, when a reactive ion etching is applied to the seed layer formed of noble metal that is not etched in the reactive ion etching method, such as Pt, Ir and the like, the Pt or Ir is rather re-deposited in the form of polymer on the sides of the Ru bottom electrode, thus dropping the performance of the bottom electrode. In this case, it is necessary to perform an additional process for removing the re-deposited noble metal.
Therefore, a technology for removing the seed layer using wet etching is in need. Since the Pt or Ir is not dissolved in a solution, when it is in the form of metal, Ru should be used for the seed layer. Ru can be removed easily through the oxidation and reduction reaction between ions in an aqueous solution.
It is, therefore, an object of the present invention to provide a method for fabricating a capacitor using an electrochemical deposition method and a wet etching using Ce(NH4)2(NO3)6 solution, the method being favorable for the fabrication of a highly integrated semiconductor device and enhancing step coverage and the performance of the electrodes.
In accordance with an aspect of the present invention, there is provided a method for fabricating a capacitor, comprising the steps of: a) forming a contact hole in an insulation layer on a substrate; b) forming a plug including nitride in the contact hole; c) forming a Ru seed layer in the contact hole and on the insulation layer; d) forming a sacrificial layer including an open area overlapped with the contact hole on the Ru seed layer; e) forming a Ru layer for an electrode of the capacitor in the open area by performing electrochemical deposition; f) removing the sacrificial layer, whereby the Ru seed layer not covered with the Ru layer is exposed; and g) etching the exposed Ru seed layer by using an aqueous solution including Ce(NH4)2(NO3)6.
Conventionally, the Ru thin film formed in an electrochemical method has been applied to the surface treatment of jewels and noble metal. The Ru thin film formed in an electrochemical method is firm and strong to corrosion and low resistance. So, it is very suitable for a bottom electrode of a capacitor in a semiconductor device.
When the electrochemical method is used, the thin film is deposited optionally on the part where a conductive metal is exposed. Also, the electrolyte used in the electrochemical method can be reused at any time. Therefore, the electrochemical method is more favorable in the matter of cost than the metalorganic chemical vapor deposition.
When the electrochemical deposition is used, the surface step coverage as fine as that obtained by performing chemical vapor deposition (CVD) can be secured. Also, films are formed on an atom basis, just as in the physical vapor deposition method, such as sputtering, so very fine thin film can be obtained. Therefore, the electrochemical deposition method has an advantage that the thin film is not cracked in the subsequent thermal treatment, which is different from the Ru thin film formed in the metal organic chemical vapor deposition.
Also, when the Ru thin film formed in the metal organic chemical vapor deposition is used as a seed layer for flowing electricity, although the Ru seed layer is cracked after annealing, there is an advantage that the cracked gap can be filled in delicately with Ru by performing electrochemical deposition. This advantage makes the electrochemical deposition a powerful method that can be applied to the fabrication of a capacitor used in the next-generation DRAM.
In the present invention, a Ru bottom electrode is formed in the electrochemical deposition method, and then the Ru bottom electrode is isolated by using an aqueous solution containing cerium ammonium nitrate (Ce(NH4)2(NO3)6: CAN). Also, the space between the bottom electrodes can be widened by etching the surface of the Ru bottom electrode along with the Ru seed layer to thereby secure subsequent process margin, when the Ru bottom electrode is isolated.
In an embodiment of the present invention, the Ru seed layer and the Ru bottom electrode are etched simultaneously using a mixture solution of CAN, HNO3, and deionized water. The mechanism of this wet etching method is that Ru is oxidized into Ru(OH)x and the Ru thin film is corroded, as Cr is changed from quadravalence (+4) to trivalence (+3).
Here, the nitride prevents CAN from being hydrated in the deionized water. The Ru is removed completely by dipping the semiconductor substrate in a solution having CAN and cleaning it for about 10 seconds in a deluted HF solution (HF:H2O=1:500).
The purpose of the cleaning processing using HF solution is to remove the by-products generated in the wet etching process using CAN. Since the HF is used only for about 10 seconds, the oxide layer under the Ru bottom electrode is not damaged.
Since the CAN-containing solution dissolves Ru but it does not dissolve silicon oxide or conductive nitride, the CAN-containing solution is very suitable for the purpose of the present invention.
In this invention, Ru salt is dissolved in an aqueous solution and used as an electrolyte. The Ru salt mainly used here includes ruthenium sulfamate and ruthenium nitrosyl sulfamate.